Dismiss
InnovationQ and the IP.com Prior Art Database will be updated on Sunday, December 15, from 11am-2pm ET. You may experience brief service interruptions during that time.
Browse Prior Art Database

HIGH-SPEED PARALLEL TURBO DECODING FOR MAX-LOG-MAP KERNEL OPERATION ALGORITHM

IP.com Disclosure Number: IPCOM000004632D
Original Publication Date: 2001-Mar-02
Included in the Prior Art Database: 2001-Mar-02

Publishing Venue

Motorola

Related People

Authors:
Jun Ma Ali Saidi

Abstract

Optimal (MAP or log-MAP) decoding of the constituent codes in turbo decoding is prohibited by its intensive computational complexity for high data rate systems. Sub-optimal algorithms such as max-log-MAP are widely adapted due to their low computational complexity. Although parallelism can be explored across the trellis states, throughput is limited by the number of states in the forward and backward recursive computations of the state metric parameters alpha k (or beta k). In this paper, a novel look-ahead transformation based parallel turbo decoding architecture is proposed for the max-log-MAP algorithm. The resulting parallel architecture is achieved at the cost of additional computational complexity. VLSI architectures for both application specific and programmable implementations are considered. Novel instructions are proposed for high-speed turbo decoding on SIMD type application processors.