MULTI-FUNCTION INPUT/OUTPUT PAD INTERFACES SHARED BETWEEN PROGRAMMABLE AND MICROPROCESSOR CORES, INTEGRATED WITHIN A PROGRAMMABLE SOC SOLUTION
Original Publication Date: 2001-Mar-21
Included in the Prior Art Database: 2001-Mar-21
The advances in technology that are driving System on Chip (SoC) technologies are also driving advancements in programmable technologies. However a programmable technology, by its nature offers lower silicon efficient but highly flexible solution in comparison to a custom/semi-custom solution. By merging the two technologies it is possible to offer a programmable SoC solution that delivers both a high performance IP block implementation with the added flexibility of a programmable resource that can be used by the customer to rapidly integrate their IP. All of today's system solutions providers, including Motorola offer 'application domain specific' SoC solutions that integrate several IP blocks in the form of embedded cores, memories and peripheral functions. Depending on the customer's application the I/O pad interface requirements to each of the integrated IP blocks may alter. To resolve this I/O pad constrained problem it is common practice to provide multiplexed I/O pads that can be configured by the customer's application. The I/O pad constraint also applies to a programmable SoC solution. However the problem is made more acute due to the high flexibility of the programmable resource. By enhancing the multiplexed I/O pad concept it is possible to provide a solution that is both I/O pad efficient and offers other inter-block connectivity advantages.