IMPEDANCE CONTROL CIRCUIT IN MEMORY
Publication Date: 2001-Jul-11
The IP.com Prior Art Database
Circuitry to interface between components of a digital solid state memory sub-system are well-known. However, increasing signal speeds, such as on the order of 500 megabit transfers per second, have made these interface circuits increasingly complex. For example, due to increasing signal speeds, it may be desirable to match impedances between components of the memory sub-system, such as between a transmitting amplifier in a memory controller and a controlled impedance signal coupling in the memory device, to reduce the amount of signal reflection that may occur.