HIGH SPEED TTL TO CIRCUIT DRIVE CIRCUIT
Original Publication Date: 1980-Aug-01
Included in the Prior Art Database: 2001-Oct-10
In many circuits, the critical timing of the logic lays primarily in one edge. The drawing illustrates a circuit that sinks a current from a load during aITL low input and removes the current very rapidly during a positive edge. The speed is contributed to: (1) Thediffusion capacitance of the input pnp translates the input edge instantaneously.