Browse Prior Art Database

PROGRAMMABLE MEMORY ADDRESS DECODING FOR MICROPROCESSOR MEMORY DEVICES

IP.com Disclosure Number: IPCOM000005486D
Original Publication Date: 1983-Mar-01
Included in the Prior Art Database: 2001-Oct-09

Publishing Venue

Motorola

Related People

Authors:
David Paldan

Abstract

The widespread use of a-bit microprocessor based controllers has resulted in a large and varied of- fering of E-bit memory devices for use with them. In the E-bit format memory manufacturers offer e ROMs, EPROMs, EEPROMs, static RAMS and others. Furthermore, these devices are available in 1 Kx8, 2Kx8, 4Kx8 and a variety of other sizes. While there is a JEDEC pinout standard that can be used in a memory circuit layout, devices of nominally the same type and size may require incompatible timing relationships between control signals. Once the memory designer has selected a device, it is difficult to change the layout to replace a memory device with one that becomes cheaper, larger or more widely supported.