Browse Prior Art Database

SHIFT REGISTER FIFO

IP.com Disclosure Number: IPCOM000005518D
Original Publication Date: 1983-Mar-01
Included in the Prior Art Database: 2001-Oct-11

Publishing Venue

Motorola

Related People

Authors:
Robert Pancost Yoseph Linde

Abstract

This FIFO (First In, First Out Register) is implemented as a Shift Register with a selector on the out- put of each cell location such that the stored data in the cell(s) may be either shifted to the next sequen- tial cell(s) or gated to the output of the FIFO. The FIFO may be from 1 ton bits in length and one tom bits In width.