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TESTING A CRC CHECKER

IP.com Disclosure Number: IPCOM000005582D
Original Publication Date: 1985-Oct-01
Included in the Prior Art Database: 2001-Oct-17

Publishing Venue

Motorola

Related People

Authors:
Yehuda Shaik

Abstract

In data transmission systems which include error detection/correction circuits of the Cyclic Redundance Check (CRC) type, the transmitter serially transmits each block of data while simultaneously processing the data using a selected N-bit CRC generator, and then transmits the resulting N-bit CRC polynomial to complete a "Frame". At the receiver, each Frame is continuously processed by an identical CRC generator. After the last bit in the Frame is processed, the remainder polynominal R(x) is compared against a constant remainder polynomial C(x). If the two polynomials are identical, there was no error in the Frame.