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Process For Forming A Semiconductor Device

IP.com Disclosure Number: IPCOM000005590D
Original Publication Date: 2001-Oct-17
Included in the Prior Art Database: 2001-Oct-17

Publishing Venue

Motorola

Related People

Authors:
Sergio A. Ajuria James M. Heddleson Kimberly A. Pacheco Susan E. Soggs

Abstract

A process forms trench field isolation for a semiconductor device. After forming a planarization-stop layer over a substrate, an opening through the planarization-stop layer and a trench in the substrate are formed. In one embodiment, a trench fill material fills the trench without using a trench liner, In other embodiments, a trench liner is formed before filling the trench. The trench fill material is exposed to an H2O-containing ambient, wherein a portion of the substrate at the trench walls is oxidized during this step. A portion of the trench fill material that overlies the planarization-stop layer is then removed. The process is particularly useful in devices with a plurality of etches and cleans due to the use of different gate dielectric layer thickness, such as devices that include a nonvolatile memory array.