SEPARATION OF EXCEPTION RECOGNITION, PRIORITIZATION, AND STATE MAINTENANCE
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2001-Oct-18
As processors become increasingly complex, so do the exception recognition and handling requirements of the processor. Complex processors, such as the MC68000, MC68010, and MC68020 were designed to recognize and handle a number of internally and externally generated exception conditions. Among these are interrupts, bus errors, addressing errors, illegal instruction, privilege violations, division by zero, trace exceptions, emula- tion exceptions, and other various exceptions which might occur in a processing system.