Browse Prior Art Database

INTERRUPT STACK MECHANISM

IP.com Disclosure Number: IPCOM000005618D
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2001-Oct-19
Document File: 1 page(s) / 88K

Publishing Venue

Motorola

Related People

Authors:
Dave Mothersole Dave Trissel

Abstract

When exception processing occurs, information that is pushed onto memory stacks is normally associated with the interrupted process state. It is optimal for the operating system if this information is stacked into a storage area dedicated for information of that particular process, The original M68000 architecture does not allow for this since multiple exceptions can occur on the system stack. This publication deals with the improve- ment of the M68000 family architecture that was designed into the MC68020 implementation. This improvement allows process related exception information to be stacked only in the area of storage or stack corresponding to the interrupted process. This removes the M68000 requirement of copying data between system stack and process control blocks. Page fault (bus error) handling becomes much more efficient as a result.