DMA ROOT POINTER
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2001-Oct-22
Logical bus DMA activity is supported by the MC68851 PMMU. Designers use logical DMA to gain access to the protection mechanisms provided by a memory management unit. When a logical bus access occurs, the PMMU references its Address Translation Cache (ATC) and drives out the physical address translation associated with the logical access. In parallel, the PMMU also performs checks on protection information stored along with the physical address, and asserts control signals for either a normal continuation or exceptional termina- tion of the bus cycle. If, however, there is no entry in the PMMU ATC which matches the logical access, the PMMU must perform a tablewalk to fetch the translation and protection information from its tree-like transla- tion tables.