Browse Prior Art Database

A HIGH YIELD OPTOELECTRONIC WAFER PROCESS

IP.com Disclosure Number: IPCOM000005626D
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2001-Oct-22
Document File: 2 page(s) / 92K

Publishing Venue

Motorola

Related People

Authors:
Neal Mellen Diana Convey

Abstract

A significant problem in the fabrication of InGaAsP and AlGaAs LEDs is the breakage of wafers during processing because of the fragility of III-V compounds. The problem becomes more severe after the wafer is lapped and polished to the desired thickness (3-4 mils for some devices). Submounts have been used previous- ly to minimize breakage with some success. These submounts have always been removed at a later point in the process resulting in subsequent handling of thin wafers. The technique described below minimizes wafer breakage by permanently bonding asubmount to the wafer before the wafer is thinned, thus, eliminating handl- ing of the wafer directly when it is the most fragile. This technique is applicable whenever the thermal conduc- tivity loss due to the submount is either negligible compared to the package thermal conductivity or when the die heat dissipation is not a major concern for device operation or reliability.