Method for a partitioned capacitor in BBUL for chipset and non-CPU applications
Publication Date: 2001-Oct-23
The IP.com Prior Art Database
Disclosed is a method for a partitioned capacitor in bumpless build-up layer (BBUL) technology for chipset and non-CPU applications. Benefits include improved placement, reduced inductance, and improved capacitance of bypassing capacitors and processors, and an improved method for meeting multiple-voltage requirements of a chipset or non-CPU I/O power delivery system.