Browse Prior Art Database

SHADOW SCOREBOARD AND IMPLEMENTATION

IP.com Disclosure Number: IPCOM000005726D
Original Publication Date: 1988-Oct-01
Included in the Prior Art Database: 2001-Oct-31

Publishing Venue

Motorola

Related People

Authors:
Yoav Talgam

Abstract

Motorola's MC88100 processor is capable of concurrently processing multiple instructions at a single point of time if (1) the functional units processing each instruction is not full (there are multiple pipeline functional units: 3 stage integer processor, 5 stage floating point adder, 6 stage floating point multiplier) and if (2) the concurrently executing instructions are mutually independent - such that concurrent execution does not violate sequential program execution model.