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SIMOX AND INDUCED LATERAL OVERGROWTH FOR PEDESTAL BIPOLAR AND 3D DEVICES

IP.com Disclosure Number: IPCOM000005731D
Original Publication Date: 1988-Oct-01
Included in the Prior Art Database: 2001-Oct-31

Publishing Venue

Motorola

Related People

Authors:
H. Ming Liaw

Abstract

Speed performance in a bipolar device can be improved by optimization of extrinsic device parameters. These include the reduction of the collector to substrate capacitance (Ccs), the collector to base capacitance (Ccb), the extrinsic base resistance (Rb), and collector resistance (Rc). Various device structures have been reported aiming for reduction of parasitic capacitances. They include local isolation of silicon (LOCOS), sidewall contacted oxidized silicon (SICOS), and pedestal typed bipolar devices by selective epitaxial growth. More recently, Schubert et al* have proposed a selective epitaxy and double epitaxial overgrowth process to eliminate the need of n+ buried layer as a subcollector. This results in a further reduction of Ccs, Ccb and Rc.