Browse Prior Art Database

IMPROVED PLL LOCK TIME BY PREDICTIVE PROGRAMMING

IP.com Disclosure Number: IPCOM000005740D
Original Publication Date: 1988-Oct-01
Included in the Prior Art Database: 2001-Nov-01
Document File: 3 page(s) / 124K

Publishing Venue

Motorola

Related People

Authors:
William J. Ooms James S. Irwin

Abstract

The lock time of a simple phase locked loop shown in figure 1 below may be improved by changing the loop divider value while changing frequencies. When a tri-state charge pump phase detector is used, optimum lock time will be achieved if the output current can be kept at a maximum constant output for enough time to provide sufficient charge to bring the loop filter capacitors to the desired final state. This can be accom- plished as shown in the timing diagram shown in figure 2.