CONSTANT VD - ID PROGRAMMING OF EPROM MEMORY CELLS
Original Publication Date: 1989-Aug-01
Included in the Prior Art Database: 2001-Nov-05
It is customary to program an EPROM element by applying drain and control gate biases (relative to the source) such that hot electrons generated in the substrate near the Si-SiOz interface surmount the interface barrier, and drift to the floating gate in the oxide electric field. The purpose of this paper is to show that fastest programming of an EPROM with a given channel length can be accomplished by controlling the gate voltage such that drain current stays relatively constant.