Browse Prior Art Database

SMART ALLOCATE POLICY FOR ASSOCIATIVE COPY BACK CACHE

IP.com Disclosure Number: IPCOM000005845D
Original Publication Date: 1990-Mar-01
Included in the Prior Art Database: 2001-Nov-12
Document File: 2 page(s) / 112K

Publishing Venue

Motorola

Related People

Authors:
Robin Edenfield Ralph McGarity Russ Reininger

Abstract

The constantly increasing requirement for memory bandwidth by microprocessors has led to the widespread use of caches to provide a fast local memory. Furthermore, for data caches the use of a copy-back write policy is used to significantly reduce the number of writes to memory. This reduction is a result of the writes from the processor only going to the cache. The written or dirty cache entry is only written to main memorywhen that entry is chosen for replace- ment to make room for a new entry, or is specifically pushed out of the cache by a cache maintenance instruction. While the push for replacement by a new entry is normally transparent to processor activity, the push can generate an external bus error condition.