Browse Prior Art Database

LOW LOSS REGULATOR

IP.com Disclosure Number: IPCOM000006061D
Original Publication Date: 1991-Apr-01
Included in the Prior Art Database: 2001-Nov-29
Document File: 2 page(s) / 69K

Publishing Venue

Motorola

Related People

Authors:
Bill Dunn

Abstract

In many applications a circuit needs to be designed that can accept a wide range of supply voltages (4.5 to 15.5 Volts), as with CMOS logic gates. However, if high speed logic circuits are required (10 MHz or greater), they are limited to devices with small geometries, whose operating voltage is limited to about 6.5 volts. For operation over this supply voltage range the solution is to incorporate a voltage regulator, but with this circuit there is a loss of 1 Volt, or greater at low temperatures (in the circuit shown the voltage drop is across PMOS P2 + Vbe of QN2), so that at minimum supply voltages the logic circuits will only see between 3 and 3.5 Volts. At these low voltages the operating * frequency of the logic is greatly reduced i.e., to one half of the operating frequency at 5 volts.