Browse Prior Art Database

COMBINATION PC/LINE PREFETCH ADDRESS ADDER

IP.com Disclosure Number: IPCOM000006168D
Original Publication Date: 1991-Jul-01
Included in the Prior Art Database: 2001-Dec-11
Document File: 2 page(s) / 78K

Publishing Venue

Motorola

Related People

Authors:
Thomas Spohrer Russell Reininger Jeffrey Freeman Ashok Someshwar

Abstract

The pc section of the 68040 integer unit calculates the instruction program counter (PC) and instruction prefetch address (PFA). The PC is a word address (31-bits) and the prefetch address is a quad-word address (29-bits). In each cycle, the pc unit calculates a new PC based on the length of the dispatched instruction and PFA based on length of the dispatched instruction and the number of words left in the 128- bit, 8-word prefetch buffer, (PB).