Browse Prior Art Database

INTEGRATION OF SELF-ALIGNED POLY EMITTER NPN INTO CMOS-BASED BiCMOS

IP.com Disclosure Number: IPCOM000006362D
Original Publication Date: 1992-May-01
Included in the Prior Art Database: 2001-Dec-28
Document File: 2 page(s) / 97K

Publishing Venue

Motorola

Related People

Authors:
Robert H. Reuss Terry S. Hulseweh

Abstract

A standard CMOS process can be converted to a BiCMOS process by adding a few extra steps, primarily at the completion of the CMOS flow. A base region is implanted, dielectric deposited (l-3K) to isolate the CMOS devices, an opening made in the dielectric to define the emitter contact, and poly silicon deposited, doped, patterned, and annealed (Figure 1). The resulting NPN has the virtue of adding few extra steps to the baseline CMOS flow. Unfortunately, there are several significant drawbacks with this approach.