INTEGRATION OF SELF-ALIGNED POLY EMITTER NPN INTO CMOS-BASED BiCMOS
Original Publication Date: 1992-May-01
Included in the Prior Art Database: 2001-Dec-28
A standard CMOS process can be converted to a BiCMOS process by adding a few extra steps, primarily at the completion of the CMOS flow. A base region is implanted, dielectric deposited (l-3K) to isolate the CMOS devices, an opening made in the dielectric to define the emitter contact, and poly silicon deposited, doped, patterned, and annealed (Figure 1). The resulting NPN has the virtue of adding few extra steps to the baseline CMOS flow. Unfortunately, there are several significant drawbacks with this approach.