Browse Prior Art Database

VIDEO SYSTEM CONTROLLER

IP.com Disclosure Number: IPCOM000006455D
Original Publication Date: 1992-May-01
Included in the Prior Art Database: 2002-Jan-04
Document File: 3 page(s) / 139K

Publishing Venue

Motorola

Related People

Authors:
Richard M. Povenmire

Abstract

This describes a video system controller (VSC) for systems utilizing cathode ray tube (CRT) displays. To display data on a CRT screen requires means for efficient storage, updating and transmission of video data to the CRT The storage medium is typically a dynamic mem- ory array requiring signals controlliig read and write access to the memory array, known as processor request cycles, as well as signals to generate refresh and display update cycles. Display update cycles transfer an entire row of information from the memory array into a shii register which is then clocked to produce one horizon- tal scan line of video data. Refresh cycles are required at certain intervals to recharge the dynamic memory ele- ments. The refresh and display update cycles must occur within a specified period of time while the processor may require access to the memory at any time.