Browse Prior Art Database

Partial Via-First Dual Inlaid Integration With Buried Etchstop

IP.com Disclosure Number: IPCOM000006508D
Original Publication Date: 2002-Jan-11
Included in the Prior Art Database: 2002-Jan-11

Publishing Venue

Motorola

Related People

Authors:
Brad Smith

Abstract

This invention uses a buried etchstop layer in the via dielectric to provide via bottom size control as well as minimizing the capacitive effects of the etchstop layer.