Browse Prior Art Database

AUTO INCREMENTAL MICROSHAPING (AIM) FOR SILICON ON INSULATOR (SOI) THICKNESS CONTROL

IP.com Disclosure Number: IPCOM000006712D
Original Publication Date: 1992-Dec-01
Included in the Prior Art Database: 2002-Jan-24
Document File: 3 page(s) / 147K

Publishing Venue

Motorola

Related People

Authors:
Raymond C. Wells

Abstract

Wafer Bonding has become a weU known and pre- ferred process for producing Silicon on Insulator (SOI) materials used in various new device design applications. The process for manufacture of SOI Wafers is shown in Figure 1. In the old process the thickness of the base wafer is known and the bonded wafer is ground to this thickness, plus that of the oxide, the SOI layer desired and the polish removal required to remove grind dam- age. After grind the wafers are measured for SOI layer thickness by FTIR. The wafers are then sorted for SO1 thickness and polished to the desired thickness by adjustig polish time for each sort catagory. Due to pol- ish removal rate variables this measure and sort process typically results in a large variance from the desired thickness.