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GRADE MARKING OF TESTED WAFER-LEVEL SEMICONDUCTOR DIE VIA PHOTORESIST

IP.com Disclosure Number: IPCOM000006714D
Original Publication Date: 1992-Dec-01
Included in the Prior Art Database: 2002-Jan-24

Publishing Venue

Motorola

Related People

Authors:
Stephen G. Sheck

Abstract

Process variations and defects (random and system- atic) necessitate that semiconductor wafers be electri- cally tested to identify defective die. Traditionally, these reject die have been marked with an ink dot to indicate at package assembly that such die are defective and must not be assembled.