Browse Prior Art Database

BOUNDARY SCAN FPGA PROGRAMMING AND TESTING

IP.com Disclosure Number: IPCOM000006729D
Original Publication Date: 1993-Mar-01
Included in the Prior Art Database: 2002-Jan-28
Document File: 1 page(s) / 65K

Publishing Venue

Motorola

Related People

Authors:
Bob V. Lazaravich

Abstract

Field Programmable Logic Array (FPGA) devices are now beginning to rival custom gate arrays in terms of complexity and, to some extent, number of gates. Devices with 2,000 to 10,000 equivalent internal gates are quite common. Just about any new hardware design contains several programmable devices. A basic prob- lem with these devices has always been how to re-program them after they are soldered to a circuit board. The devices themselves are ohen m-programmable; how- ever, sockets are seldom used for reasons of both relia- bility and cost savings. Removing a device from a board tore-program it is generally not practical.