Browse Prior Art Database

P-CHANNEL LOAD FOR COMPLEMENTARY GaAS DCFL LOGIC

IP.com Disclosure Number: IPCOM000006796D
Original Publication Date: 1993-Mar-01
Included in the Prior Art Database: 2002-Feb-01
Document File: 2 page(s) / 93K

Publishing Venue

Motorola

Related People

Authors:
William J. Ooms

Abstract

This report describes a new logic family has been used on complementary GaAs. The goal is to achieve the fastest possible performance at low voltage (nomi- nal 1 volt supply) at a reasonably low power dissipation. Because of the extremely fast n-channel devices on GaAs (and slower p-channel devices), the P-load DCFL logic uses only n-channel devices as switching devices. How- ever, the logic swings are fully compatible with full com- plementary circuits.