Browse Prior Art Database

BLANKET CVD W WITH REPEAT DEPOSITION ETCHBACK PROCESS

IP.com Disclosure Number: IPCOM000006882D
Original Publication Date: 1993-Jun-01
Included in the Prior Art Database: 2002-Feb-08

Publishing Venue

Motorola

Related People

Authors:
Li-Hsin Chang Don Weston

Abstract

A combination of CVD W plug technology with a low dielectric constant polyimide interlevel dielectric (ILD) material is very desirable for high density, high sped multilevel metal VLSI applications. However, poly- imide cracking has been a problem found on patterned wafers after blanket CVD W deposition and etchback process. Due to the highly tensile nature of the CVD W Elm and the low tensile strength of the polyimide (PI) fihn, cracks were sometimes developed at the comers of patterns with steep steps surrounded by large open field areas. High CVD W fihn stress may also induce W delamination or "blisters" from a BPSG ILD material.