Browse Prior Art Database

Integrated Level Shifters With Gating And Inhibiting

IP.com Disclosure Number: IPCOM000007078D
Original Publication Date: 2002-Feb-22
Included in the Prior Art Database: 2002-Feb-22

Publishing Venue

Motorola

Related People

Authors:
Edward J. Yurchik Carl Wojewoda

Abstract

In many dual processor systems, the I/0 voltage levels between the two processors are different. Also, one device is often used as a peripheral and may be completely powered off while the other is still powered. External circuitry is then used to provide the following: 1) Voltage level shifting. 2) Gating (forcing a low logic level from an output buffer of the powered device) in order to prevent current leakage. 3) Inhibiting (forcing an inactive state to an input buffer of the powered device) in order to prevent false logic conditions. The external circuitry increases the cost and the size of the design. Circuitry is provided internally to overcome these disadvantages of prior systems.