REDUCING THE OVERALL WIDTH OF PLA STRUCTURES
Original Publication Date: 1994-Oct-01
Included in the Prior Art Database: 2002-Mar-13
This article describes two new techniques that can be used to reduce the overall width of PLA struc- tures in the UDR process without modifying any process rules. These techniques were first used on a large CPU PLA in the MC68HCll design group in Oak Hill, Texas. PLA structures in the MC68HC16 and the MC68332 have also been evaluated to gain additional data on possible silicon area savings.