Browse Prior Art Database

SYNCHRONISER FOR A DATA BUS

IP.com Disclosure Number: IPCOM000007356D
Original Publication Date: 1995-Mar-01
Included in the Prior Art Database: 2002-Mar-19
Document File: 2 page(s) / 103K

Publishing Venue

Motorola

Related People

Authors:
Michael Drozd

Abstract

This device provides an asynchronous data trans- mission of parallel data with an error suppression mechanism which reduces the error probability ofa parallel bus system to the probability of a single bit data transmission.