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TRENCH MOSFET STRUCTURE AND PROCESS FOR SRAM BIT CELLS

IP.com Disclosure Number: IPCOM000007378D
Original Publication Date: 1995-Mar-01
Included in the Prior Art Database: 2002-Mar-20

Publishing Venue

Motorola

Related People

Authors:
Rick Sivan-APRDL

Abstract

ADVANTAGES OF NEW STRUCTURE In order to achieve sufficient bit stability in competitively-sized SRAM bit cells, 50-55 square feature sizes are required with existing/known struc- tures and processes. The need exists for achieving both improved bit stability as well as fewer square features per bit cell in future generation SRAMs.