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IP.com Disclosure Number: IPCOM000007510D
Original Publication Date: 1995-Nov-01
Included in the Prior Art Database: 2002-Apr-02

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H. D. Bush


The customer requirement was a solid state relay which was isolated from the control circuitry and did not require any connections other than the two switch closure connections, and the connections were to be polarity independent. Minimum power for oper- ation was also desired for long battery life of the control circuitry Solution: (Refer to the schematic) The approach used in the design was to generate the necessary gate operating voltage for the TMOS FETs switch from the control circuit power source (3.3 volts) by generating a complementary square wave to be used to drive a voltage doubler via capacitors. ICla is a divide by two flip flop which generates a square wave From a one Hertz, very short duration pulse source. IClb is a latch and holds the desired state of the switch so the microprocessor which controls the switch can be shut down when desired, reducing system power usage. When the switch is to be turned on, IClb is loaded with D, and thus Q, being high. IC2a and IC2b transfer the complementary square wave to Cl and C2.