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Original Publication Date: 1995-Nov-01
Included in the Prior Art Database: 2002-Apr-08

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Richard J. Valentine


The power module driver block diagram shown in Figure 1 provides the necessary interface to power IGBT modules. One aspect of the module driver design is the internal undervoltage shutdown cir- cuit found in various MOSFET or IGBT gate driver integrated circuits such as the MC33151, MC33152, and MC33153. When these devices are used to drive 400 to 800 amp IGBTs or MOS FETS, an amplifier stage is required as shown in Figure 2. The IGBT gate drive amplifier uses complementary power MOS FETS, a P channel for providing the ON bias, and a N channel for the OFF bias. Unstable operation occurs during the powering up or down of the mod- ule's interface because the IGBT bias goes ON, instead of remaining OFF until the control logic acquires control. This is caused by the P channel device switching on when the gate driver IC is in an undervoltage shutdown mode. The shutdown mode forces the It's output low thereby turning on the P channel which in turn biases ON the IGBT Figure 3 shows a circuit that eliminates this problem, and also allows a negative IGBT gate bias. Zener diodes are used to couple the MC33151 outputs to the power FET drivers. A 6.8 volt zener is connected in series with the P FET driver. When the MC33151 is oper- ating in its UV lockout mode, which is 5.8 volts or less, the P Channel device remains off because the 6.8~ zener is non conductive. In normal IGBT on operation the P FET power driver stage is biased on with 8.2 volts (15 volt level minus the 6.8~ zener = 8.2). An active gate clamp consisting of a NPN small signal transistor insures the P FET turns off when the MC33151 output goes high. (Another approach would be to change the gate driver's internal shut- down circuit to tri-state its output, thereby allowing external pull-up or pull-down resistors to determine It's output voltage level).