Browse Prior Art Database

FAST RESET VIA ADDRESSABLE SERIAL INTERFACE

IP.com Disclosure Number: IPCOM000007621D
Original Publication Date: 1996-May-01
Included in the Prior Art Database: 2002-Apr-10

Publishing Venue

Motorola

Related People

Authors:
N. Todd Rollins Tom Quiroga

Abstract

Watchdog timer circuits detect software process- ing errors, allowing the radio hardware to reset and return to a known state in order to resume nor- mal operation. This reinitialization must be com- pleted in as short a time as possible to minimize disruptions to the radio user, as well as limit the time in which hardware can be held in an errone- ous state. Today's radio system includes a micro- processor interfacing to several peripherals in a serial data format, each independently programmed by the processor through the exchange of serial data pack- ets of varying bitlengths. Space and cost sensitivity to both package pinout and board area precludes each peripheral device from dedicating an external reset pin for controlling its critical registers. As a result, resuming to a known hardware state entails the cumbersome and time-consuming process of reprogramming each peripheral individually.