THE CORRELATION BRANCH TARGET ADDRESS CACHE (BTAC)
Original Publication Date: 1996-Aug-01
Included in the Prior Art Database: 2002-Apr-22
PowerPC microprocessors as well as many other current high performance microprocessors perform branch prediction with a Branch Target Address Cache (BTAC) working in conjunction with a Branch History Table (BHT). Ideally the BHT will provide the correct branch direction (taken or not taken), and the BTAC will augment a taken prediction with the correct target address. Since both structures are accessed during the fetch of the branch (before the calculated target address can be obtained), proces- sor cycles are saved. Some machines boost perform- ance further by using what is known as a Correla- tion BHT. "Correlation" or "Adaptive" Branch Prediction is a method that has been applied to BHTs to improve performance by introducing the past his- tory of all branches into the prediction along with the normal current branch fetch address. Thus, a Correlation BHT is indexed not just by bits from the fetch address, but also by bits from the global branch history. However, a Correlation BHT and a traditional BTAC ofien differ on predicted branch direction. For example, though the Correlation BHT might predict a branch not taken, a BTAC hit implies that the branch should be predicted taken. Further, there are some branches whose targets are different for different instruction paths to the branch. The traditional BTAC may predict the wrong address for these branches because it will predict whatever address was calculated for the last instance of the branch. A third problem with the traditional BTAC is the.competition for BTAC space that often arises among multiple branches in the same fetch packet. Since a BTAC access is based on fetch address, two or more branches within a superscalar machine's fetch packet can compete for the same BTAC entry, degrading performance.