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GAP LOGIC FOR GLOBAL SYNCHRONIZATION

IP.com Disclosure Number: IPCOM000007861D
Original Publication Date: 1996-Nov-01
Included in the Prior Art Database: 2002-Apr-30

Publishing Venue

Motorola

Related People

Authors:
James McDonald Nandini Srinivaeen

Abstract

The gap logic described below is used in PLL based systems where in addition to the reference and feedback signals, referred to as clocks, being aligned by the PLL, there is a second set of signals, referred to as syncs, which must be aligned. The relationship between the syncs and the clocks must be maintained during alignment of the syncs. The alignment of the syncs while maintaining a strict relationship with the clocks is accomplished with the gap logic.