Publishing Venue
Motorola
Related People
Authors:
Michael F. Petras
•
James F. Adams
•
Jack A. Schroeder
Abstract
The BP-l SMOS technology offers two types of capacitors: the polysilicon capacitor, which has a doped polysilicon bottom plate, and an n+ capaci- tor, which uses an n+ implanted substrate region as a bottom plate. Aluminum is used for the top plate in both cases. In the standard SMOS process, the metal traces connecting the anode and cathode of the capacitor to the rest of the circuit are isolated from the substrate by a dielectric, and therefore from each other. For Schottky-isolated capacitors (a Motorola patented technology), both the anode and cathode are in contact with the silicon. Under cer- tain bias conditions, parasitic channels form that shunt the capacitor plates and resistively couple the anode to the cathode. This limits the voltages of operation to OS-3 volts. Two things were done to address this problem: (1) the gate oxide used to isolate the polysilicon plate from the substrate was replaced with thicker field oxide, and (2) for both capacitors, dopants (channel stops) were introduced at critical places in the sub- strate to increase the threshold voltage for the parasitic elements.
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MOTOROLA Technical Developments
HIGH VOLTAGE SCHOll'KY-ISOLATED CAPACITOR
by Michael F. Petras, James F. Adams and Jack A. Schroeder
The BP-l SMOS technology offers two types of capacitors: the polysilicon capacitor, which has a doped polysilicon bottom plate, and an n+ capaci- tor, which uses an n+ implanted substrate region as a bottom plate. Aluminum is used for the top plate in both cases. In the standard SMOS process, the metal traces connecting the anode and cathode of the capacitor to the rest of the circuit are isolated from the substrate by a dielectric, and therefore from each other. For Schottky-isolated capacitors (a Motorola patented technology), both the anode and cathode are in contact with the silicon. Under cer- tain bias conditions, parasitic channels form that shunt the capacitor plates and resistively couple the anode to the cathode. This limits the voltages of operation to OS-3 volts. Two things were done to address this problem:
(1) the gate oxide used to isolate the polysilicon plate from the substrate was replaced with thicker field oxide, and
(2) for both capacitors, dopants (channel stops) were introduced at critical places in the sub- strate to increase the threshold voltage for the parasitic elements.
For the polysilicon capacitor, the primary chan- nel stop is directly under the field oxide where the anode and cathode overlap to form the capacitor (the parasitic gate region). For an n-type substrate, an n+ doping is used, whereas for...
