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HIGH VOLTAGE SCHOTTKY-ISOLATED CAPACITOR

IP.com Disclosure Number: IPCOM000007959D
Original Publication Date: 1997-Mar-01
Included in the Prior Art Database: 2002-May-08

Publishing Venue

Motorola

Related People

Authors:
Michael F. Petras James F. Adams Jack A. Schroeder

Abstract

The BP-l SMOS technology offers two types of capacitors: the polysilicon capacitor, which has a doped polysilicon bottom plate, and an n+ capaci- tor, which uses an n+ implanted substrate region as a bottom plate. Aluminum is used for the top plate in both cases. In the standard SMOS process, the metal traces connecting the anode and cathode of the capacitor to the rest of the circuit are isolated from the substrate by a dielectric, and therefore from each other. For Schottky-isolated capacitors (a Motorola patented technology), both the anode and cathode are in contact with the silicon. Under cer- tain bias conditions, parasitic channels form that shunt the capacitor plates and resistively couple the anode to the cathode. This limits the voltages of operation to OS-3 volts. Two things were done to address this problem: (1) the gate oxide used to isolate the polysilicon plate from the substrate was replaced with thicker field oxide, and (2) for both capacitors, dopants (channel stops) were introduced at critical places in the sub- strate to increase the threshold voltage for the parasitic elements.