Page Buffer Control for High Performance Dual-Flash EEPROM Microcontroller and Method Thereof
Original Publication Date: 2002-May-16
Included in the Prior Art Database: 2002-May-16
Page buffer control is implemented on a microcontroller with a large embedded flash EEPROM memory unit. The page buffers are controlled by a separate Flash Bus Interface Unit to provide the customer with the flexibility to achieve maximum system performance.