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Method for a buffer process monitor Disclosure Number: IPCOM000008260D
Publication Date: 2002-May-30
Document File: 2 page(s) / 35K

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The Prior Art Database


Disclosed is a method for a buffer process monitor. Benefits include improved functionality.

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Method for a buffer process monitor

Disclosed is a method for a buffer process monitor. Benefits include improved functionality.


              No high-volume manufacturing (HVM) indicator exists for I/O among conventional validation methods. The silicon simulator correlation process is performed based on a few BIOS register readouts and indirect correlations form waveshapes and timing information. Clearly, a requirement exists and is becoming critical with shrinking processes. Circuits must be over-designed in absence of the correct HVM I/O process indicators.

              Most interfaces employing RCOMP/ZCOMP/ICOMP and slew rate control use register-based switching of pull-up/pull-down transistors. However, the transistor strength detected by the sensing circuit determines how many transistor legs must be switched to meet impedance requirements. Typically, BIOS can readout these values on the platform, providing circuit design teams an idea of the silicon-fabrication results. However, the BIOS-based method is cumbersome can only be employed as a validation indicator.

              As processes continue to shrink, the requirement for a tighter silicon-simulation correlation as well as adaptive test methodologies continue to grow.


              The disclosed method is a tool that is I/O-equivalent of the conventional core process monitor, Procmon. This method, called IO Procmon, provides information about the actual strength of pull-up and pull-down transistors on the real silicon of a typical device using its design simulation predictions obtained from circuit-process collaterals. This method provides a valuable feedback to fabrication and circuit-design teams to adjust the process, collat...