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A PVD System Design for Improved Deposition Performance

IP.com Disclosure Number: IPCOM000008274D
Original Publication Date: 2002-May-31
Included in the Prior Art Database: 2002-May-31

Publishing Venue

Motorola

Related People

Inventors:
Da Zhang

Abstract

Most physical vapor deposition (PVD) systems have a planar target positioned above the wafer. The target is negatively biased to induce ion sputtering and generate deposition precursors. There are two problems associated with the deposition performance in the wafer edge region of such a system. The first problem is the asymmetry of deposited features in the wafer edge region, i.e., the film grown on the trench/via sidewall towards the wafer edge is thicker than that towards the center.