Browse Prior Art Database

MULTI-PORT RAM WORKSPACE FOR A SINGLE-CHIP MICROCONTROLLER

IP.com Disclosure Number: IPCOM000008346D
Original Publication Date: 1997-Sep-01
Included in the Prior Art Database: 2002-Jun-07
Document File: 2 page(s) / 125K

Publishing Venue

Motorola

Related People

Authors:
Raymond L. Barrett, Jr. Barry Herold James Mittel

Abstract

The Multi-Port RAM Workspace for a Single- Chip Microcontroller utilizes a multi-port RAM, preferably in a single-chip environment, to produce a set of workspaces (equivalent to a set of register banks) allowing support for the typical RISC-like feature of a large bank of large registers without incurring the overhead delays associated with rapid context switching. Prior art has utilized the workspace concept, but incurred a performance penalty implementation from the isolated CPU and RAM structures available twenty years ago, forcing abandonment of the concept. Herein is a new architecture.