METHOD TO FORM RECESSED CAVITIES WITH MIRROR FLAT BOTTOM SURFACES

Publishing Venue

Motorola

Related People

Paul L. Bergstrom: AUTHOR

Abstract

Some semiconductor device technologies require wafer processing in etched recesses microns to tens of microns deep. In particular, microme- chanical device development may require the formation of recessed regions in a silicon wafer. These recesses can be formed from a variety of wet and dry methods including both isotropic and anisotropic etch chemistries. Applications requiring very smooth bottom surfaces with uniform depths may not be feasible using existing recess methods due to manufacturing issues. An alternative method is proposed which provides a mirror-polished bottom surface of uniform depth and a complete etch stop for most anisotropic etchants resulting in a non- critical etch time. The method requires no tixturing and produces a completely defined final geometry of the recess.

MOTOROLA Technical Developments

METHOD TO FORM RECESSED CAVITIES WITH MIRROR FLAT BOTTOM SURFACES

by Paul L. Bergstrom

ABSTRACT

  Some semiconductor device technologies require wafer processing in etched recesses microns to tens of microns deep. In particular, microme- chanical device development may require the formation of recessed regions in a silicon wafer. These recesses can be formed from a variety of wet and dry methods including both isotropic and anisotropic etch chemistries. Applications requiring very smooth bottom surfaces with uniform depths may not be feasible using existing recess methods due to manufacturing issues. An alternative method is proposed which provides a mirror-polished bottom surface of uniform depth and a complete etch stop for most anisotropic etchants resulting in a non- critical etch time. The method requires no tixturing and produces a completely defined final geometry of the recess.

PROBLEM STATEMENT

  The formation of recesses in a silicon wafer of a uniform depth with very smooth bottom surfaces is difftcult without using some kind of etch stop tech- nique. Dry process technologies typically have trouble producing smooth surfaces unless some kind of material interface is present. Dopant-dependent etch stops using p+-silicon', electrochemical etch stops on p-n junctions?, and timed etches are com- monly used with anisotropic wet chemical processing such as potassium hydroxide (KOH), ethylenediamine pyrocatechol (EDP), tetramethyl ammonium hydroxide (TMAH), hydrazine, or other anisotropic silicon etches. Dopant-dependent etch stops typically require extremely high dopant levels in the etch stop layer, often over lO"'icm'. Many process and device technologies preclude the use of such highly-doped layers due to difficulties with process control or incompatibilities with the sensing technique. Electrochemical etch stops produce very well defined and smooth recesses compatible with

subsequent processing but require significant fixturing which may introduce processing and manufacturing challenges. Timed etches are commonly used in manufacturing but are limited in their ability to produce smooth surfaces with tightly-controlled etch depths. These anisotropic etch chemistries successfully produce such recesses but may cause hillock formation in the bottom of the recess' or produce nonuniform etch depths both across the wafer and from wafer to wafer.

PROPOSED SOLUTION

  The nonuniform trench depth and trench rough- ness can have significant impact on subsequent wafer processing and ultimately on device uniformity. An alternative recessed trench process was considered to provide a smooth bottom surface and a uniform trench depth. This process merges the advantages of an electrochemical etch stop with the process flexibility of an etch stop technology. The proposed process technology is outlined in Figure 1. The process would provide a mirror-smooth bottom sur- face of the recess by masking the mirror-polished s...