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INSULATING PASSIVATION AND ARC FILMS BY REACTIVE SPUTTERING OF M-Si TARGETS

IP.com Disclosure Number: IPCOM000008713D
Original Publication Date: 1998-Jun-01
Included in the Prior Art Database: 2002-Jul-04

Publishing Venue

Motorola

Related People

Authors:
Ramnath Venkatraman Ajay Jain Kevin Lucas

Abstract

Conventional metalization for integrated circuit (IC) devices involves the patterning of metallic thin films, typically Al, through deposition, lithography and reactive ion etching (RIE). Recently, the inlaid (or damascene) approach' is being increasingly identified as a technology for future generations of IC devices. In this approach, metal interconnects are patterned through a series of steps involving dielectric deposition, patterning of dielectric to define trenches (lines) and vias, metal till, and finally, by chemical mechanical polishing (CMP). The technology is referred to as 'dual inlaid' when trenches and via are both defined prior to metal fill.