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Method to Reduce Line Edge Roughness During Gate Etching Disclosure Number: IPCOM000008739D
Original Publication Date: 2002-Jul-08
Included in the Prior Art Database: 2002-Jul-08

Publishing Venue


Related People

Shahid Rauf Jonathan Cobb Phillip Stout Peter Ventzek


Line edge roughness at the transistor gate can appreciably deteriorate transistor electrical characteristics. This problem is expected to grow worse as transistor sizes decrease. A new method, reduces edge roughness on transistor gates, which can be used at different stages during the transistor gate definition process. In the proposed method, a fluorocarbon film is first deposited on the wafer surface in such a manner that the film is only present on horizontal surfaces and almost absent on vertical surfaces. Following it, ion assisted physical sputtering is used to remove rough bumps on the feature sidewalls. The fluorocarbon film deposited during the first step protects material at horizontal surfaces from energetic ions. The proposed technique can be used prior to photoresist trimming, after photoresist trimming, or after the gate formation process.