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Method for an integrated solution to reliability and coplanarity issues on BGA packages with small pitch, large package, large die, and high-speed chips

IP.com Disclosure Number: IPCOM000009095D
Publication Date: 2002-Aug-07

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for an integrated solution to reliability and coplanarity issues on ball-grid array (BGA) packages with small pitch, large package, large die, and high-speed chips. Benefits include improved prevention of defects, improved functionality, and improved design flexibility.