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Method for synchronizing high-frequency outputs of multiple integrated on-chip PLLs by means of phase-detection shadowing

IP.com Disclosure Number: IPCOM000009101D
Publication Date: 2002-Aug-07

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for synchronizing high-frequency outputs of multiple integrated on-chip phase-locked loops (PLLs) by means of phase-detection shadowing. Benefits include improved performance, an improved design environment, and an improved test environment.