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Method for a process flow for fabricating transistors on both sides of the top wafer in a vertically stacked wafer system

IP.com Disclosure Number: IPCOM000009254D
Publication Date: 2002-Aug-13

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a process flow for fabricating transistors on both sides of the top wafer in a vertically stacked wafer system. Benefits include improved functionality and improved performance.