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Browse Prior Art Database

EFFICIENT BUILT-IN MEMORY CHECK METHOD

IP.com Disclosure Number: IPCOM000009341D
Original Publication Date: 1999-Jun-01
Included in the Prior Art Database: 2002-Aug-19
Document File: 4 page(s) / 224K

Publishing Venue

Motorola

Related People

Authors:
Ezzy Dabbish Tom Messerges Greg Bare

Abstract

This circuit describes the use of a software/hard- ware accessible memory check circuit that can be used to verify program memory integrity prior to critical operations. The use of the existing Jump-to- Subroutine (JSR) instruction with a special address trap starts the checking process. The checking process passes the contents of the program memory followed by its CRC into a CRC circuit yielding a constant answer which can be easily checked by a simple hardware comparator. The checking process ends by invoking a Return-from-Subroutine (RTS) instruction that returns control to the main program. All of these elements result in an efficient and low cost solution.