BUS INTERFACE TERMINATION PROTOCOL FOR LOW POWER SYSTEMS
Original Publication Date: 1999-Jun-01
Included in the Prior Art Database: 2002-Aug-19
Low power CMOS systems rely on a number of power saving design techniques to reduce overall system power consumption. Notably, reduced sig- nal swing (voltage component) and reduction of sig- nal switching activity (effective switching frequency component) are among the most effective tech- niques for power reduction in a traditional CMOS design.